Build and install the Open FPGA toolchain (F4PGA) on the Aarch64 base Ubuntu environment.

Jun OKAMURA
7 min readMay 27, 2023

Open FPGA toolchain

This is a detailed installation procedure for the Open FPGA toolchain into Ubuntu on my MAC M1 powered by UTM.

Followed the below URL, but the toolchain binaries are all for X86_64 of the conda package, and it seems there is no Aarch64 version. Orz…

LiteX-Hub is an Anaconda organization to pack all EDA toolchains, looks like it supports only Linux-64 and OSX-64, which are x86_64 base.

Installing all necessary tools by Scratch

Under the x86_64 installing procedure, the following commands loaded necessary tools into the conda environment.

conda env create -f $FPGA_FAM/environment.yml

The file “environment.yml” includes the all dependencies;

name: xc7

channels:
- litex-hub

dependencies:
- litex-hub::openfpgaloader
- litex-hub::prjxray-tools
- litex-hub::gcc-riscv64-elf-newlib
- litex-hub::prjxray-db
- litex-hub::vtr-optimized
- litex-hub::yosys
- litex-hub::symbiflow-yosys-plugins
- make
- lxml
- simplejson
- intervaltree
- git
- pip
# Packages installed from PyPI
- pip:

Unfortunately, litex-hub does not support Aarch64 yet, so we need to make all the necessary modules from the scratch.

Ubuntu on MAC M1 by UTM

Just reference as for the VM.

Install all necessary PKG modules by apt

$ sudo apt update

$ sudo apt upgrade

$ sudo apt install build-essential clang bison flex \
libreadline-dev gawk tcl-dev libffi-dev git gh libftdi1-dev \
graphviz xdot pkg-config python3 libboost-system-dev \
libboost-python-dev libboost-filesystem-dev zlib1g-dev \
cmake autoconf python3-pip

# update ca-certificates
$ sudo apt install --reinstall ca-certificates
$ sudo update-ca-certificates -f

# Toolchain install directory
$ sudo mkdir /opt/f4pga

# Add path
$ export F4PGA_INSTALL_DIR=/opt/f4pga
$ export PATH="$PATH":$F4PGA_INSTALL_DIR/bin

Install openFPGALoader

Openfpgaloader package URL is below.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone trabucayre/openFPGALoader
$ cd openFPGALoader

$ cmake --install-prefix $F4PGA_INSTALL_DIR .

# VM has 4 CPUs then -j4
$ make -j4

$ sudo make install

Then join the “dialout” group and setupped “/etc/udev/rules.d” for FTDI device recognition.

# Need for rw permission for /dev/ttyUSB
$ sudo usermod -a -G dialout `whoami`

# Neccesary to use openFPGALoader to recognize FTDI device.
$ sudo cp 99-openfpgaloader.rules /etc/udev/rules.d/

Install prjxray-db

Prjxray-db package URL is below.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone f4pga/prjxray-db
$ sudo cp -r prjxray-db $F4PGA_INSTALL_DIR/share/

$ cat > ./prjxray-config << EOF
#!/bin/bash
echo /opt/f4pga/share/prjxray-db
EOF

$ sudo mv prjxray-config $F4PGA_INSTALL_DIR/bin/
$ chmod a+x $F4PGA_INSTALL_DIR/bin/prjxray-config

Install prjxray-tools

Prjxray-tools package URL is below.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone f4pga/prjxray
$ cd prjxray

# update submodule
$ git submodule update --init --recursive

$ mkdir build
$ cd build/

# set proper install directory
$ cmake --install-prefix $F4PGA_INSTALL_DIR ..

# VM has 4 CPUs then -j4
$ make -j4

# install
$ sudo make install

Install vtr-optimized

VTR package URL is below.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone verilog-to-routing/vtr-verilog-to-routing
$ cd vtr-verilog-to-routing

# install necessay build modules.
$ ./install_apt_packages.sh

# install necessary Python module
$ sudo pip install -r requirements.txt

$ mkdir build
$ cd build

# Call cmake pointing to the directory containing the root CMakeLists.txt
$ cmake --install-prefix $F4PGA_INSTALL_DIR ..

# Build
$ make -j4

TEST it.

$ cd ..
$ pwd
/home/.../vtr-verilog-to-routing

# TEST
$cd

k6_N10_mem32K_40nm/single_ff OK (took 0.21 seconds, overall memory peak 60.19 MiB consumed by vpr run)
k6_N10_mem32K_40nm/single_ff OK (took 0.20 seconds, overall memory peak 60.18 MiB consumed by vpr run)
k6_N10_mem32K_40nm/single_wire OK (took 0.20 seconds, overall memory peak 60.18 MiB consumed by vpr run)
k6_N10_mem32K_40nm/single_wire OK (took 0.20 seconds, overall memory peak 60.18 MiB consumed by vpr run)
k6_N10_mem32K_40nm/diffeq1 OK (took 5.72 seconds, overall memory peak 66.44 MiB consumed by vpr run)
k6_N10_mem32K_40nm/diffeq1 OK (took 5.84 seconds, overall memory peak 66.46 MiB consumed by vpr run)
k6_N10_mem32K_40nm/ch_intrinsics OK (took 1.34 seconds, overall memory peak 63.11 MiB consumed by vpr run)
k6_N10_mem32K_40nm/ch_intrinsics OK (took 1.33 seconds, overall memory peak 63.09 MiB consumed by vpr run)
Elapsed time: 15.08 seconds

Parsing test results...
Elapsed time: 0.11 seconds

Install it.

$ cd build
$ sudo make install

Install Icarus Verilog

Testing Yosys needs Iverilog.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone steveicarus/iverilog

$ cd iverilog/

# requirment
$ sudo apt install -y gperf

$ sh autoconf.sh

$ ./configure --prefix=$F4PGA_INSTALL_DIR

# Build
$ make -j4

$ make check
test -r check.conf || cp ./check.conf .
driver/iverilog -B. -BMvpi -BPivlpp -tcheck -ocheck.vvp ./examples/hello.vl
vvp/vvp -M- -M./vpi ./check.vvp | grep 'Hello, World'
Hello, World

# Install
$ sudo make install

Install Yosys

Yosys package URL is below.

Here is Yosys homepage.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone YosysHQ/yosys

# Yosys
$ cd yosys

# Use gcc
$ make config-gcc

# Build
$ make -j4 PREFIX=$F4PGA_INSTALL_DIR

TEST it.

$ make -j4 test
[Makefile.conf] CONFIG := gcc
cd tests/simple && bash run-test.sh ""
make[1]: Entering directory '/home/okamura/FOSS/yosys/tests/simple'
....
....
....
xprop_dffe_1ppd: ok
xprop_dffe_1ppd: ok
xprop_dffe_1npd: ok
xprop_dffe_1npd: ok
xprop_dffe_3ppd: ok
xprop_dffe_3ppd: ok
xprop_dffe_3npd: ok
xprop_dffe_3npd: ok
done
make[1]: Leaving directory '/home/okamura/FOSS/yosys/tests/xprop'

Passed "make test".

Install it.

# Install
$ sudo make install PREFIX=$F4PGA_INSTALL_DIR

Install Surelog (SystemVerilog 2017 Pre-processor)

Surelog needs to compile Yosys-plugin

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone chipsalliance/Surelog
$ cd Surelog/
$ git submodule update --init --recursive

$ sudo apt install pkg-config tclsh swig uuid-dev libgoogle-perftools-dev \
python3-orderedmultidict python3-psutil python3-dev default-jre lcov

# build (DONOT USE PREFIX)
$ make -j4

# Install (DONOT USE PREFIX)
$ sudo make install

Install symbiflow-yosys-plugins

symbiflow-yosys-plugins package URL is below.

Goto below GitHub home then install it, although the project name is not the same.

$ cd $HOME
$ gh repo clone chipsalliance/yosys-f4pga-plugins
$ cd yosys-f4pga-plugins/

# build
$ make -j4 PREFIX=$F4PGA_INSTALL_DIR

# switch to root
$ sudo su
$ export PATH=$PATH:"/opt/f4pga/bin/"

# Install by su
$ make install PREFIX="/opt/f4pga/"
$ exit

Install the f4pga Python modules


$ cd $HOME
$ wget https://github.com/chipsalliance/f4pga/archive/main.zip
$ unzip main.zip
$ sudo cp -r f4pga-main/f4pga /usr/local/lib/python3.10/dist-packages/

Install Setup and download assets

Select your target FPGA family, then follow the following installation procedure.

$ cd $HOME
$ git clone https://github.com/chipsalliance/f4pga-examples
$ cd f4pga-examples

# Set Architecture
$ export FPGA_FAM="xc7"

$ sudo mkdir -p $F4PGA_INSTALL_DIR/$FPGA_FAM

$ cd xc7

$ vi install.sh
#! /bin/bash

F4PGA_TIMESTAMP='20220920-124259'
F4PGA_HASH='007d1c1'
F4PGA_PACKAGES='install-xc7 xc7a50t_test xc7a100t_test xc7a200t_test xc7z010_test'

for PKG in $F4PGA_PACKAGES; do
wget https://storage.googleapis.com/symbiflow-arch-defs/artifacts/prod/foss-fpga-tools/symbiflow-arch-defs/continuous/install/${F4PGA_TIMESTAMP}/symbiflow-arch-defs-${PKG}-${F4PGA_HASH}.tar.xz
sudo tar -f symbiflow-arch-defs-${PKG}-${F4PGA_HASH}.tar.xz -xJC $F4PGA_INSTALL_DIR/${FPGA_FAM}
done

Install FPGA packages.

$ chmod a+x install.sh

$ ./install.sh

$ sudo pip install -r requirements.txt

# Because of cleaning the warning, reinstall fasm
$ sudo pip uninstall fasm

Reinstall the fasm module

Since “pip install fasm” induced a warning, then install it from scratch.

Goto below GitHub home then install it.

$ cd $HOME
$ gh repo clone chipsalliance/fasm
$ cd fasm
$ sudo apt install libantlr4-runtime-dev

$ git submodule update --init
$ sudo pip install Cython
$ make -j4 build

$ python3 setup.py test

# Temporalily change file permission to install without root previlege
$ sudo chmod a+w /usr/local/lib/python3.10/dist-packages/
$ sudo chmod a+w /usr/local/bin/

$ python3 setup.py install --antlr-runtime=shared

# Restore file permission
$ sudo chmod -R 755 /usr/local/lib/python3.10/dist-packageasm
$ sudo chmod -R 755 /usr/local/bin

TEST installed FPGA tool-chain

$ cd $HOME/f4pga-examples/xc7

$ TARGET="arty_35" make -C counter_test

Module `bitstream-generic` has finished its work!
Target bitstream -> /home/../f4pga-examples/xc7/counter_test/build/arty_35/top.bit
f4pga: DONE
make: Leaving directory '/home/../f4pga-examples/xc7/counter_test'

Enjoy!!

Reference

--

--